Hidden Catch (World) / Tul Lin Gu Lim Chat Ki '98 (Korea) (pcb ver 3.03)
'Hidden Catch' is a directly experiencing puzzle game by comparing scenes on the left and right and finding non-matching parts with a pen. You can feel the fun with the powerful vibration generated from the pen, when you did not find 5 non-matching pictures or when you incorrectly found.
Hidden Catch (World) / Tul Lin Gu Lim Chat Ki '98 (Korea) (pcb ver 3.03)
Ajouter
Télécharger Hidden Catch (World) / Tul Lin Gu Lim Chat Ki '98 (Korea) (pcb ver 3.03)
Contenu de la ROM :
Technique
CPU
- maincpu E1-32N (@ 45 Mhz)
- soundcpu I8032 (@ 12 Mhz)
- qs1000:cpu I8052 (@ 24 Mhz)
Chipset
- QS1000 (@ 24 Mhz)
Affichage
- Orientation Yoko
- Résolution 255 x 240
- Fréquence 60 Hz
Contrôles
- Nombre de joueurs 2
- Nombre de boutons 2
- Type de contrôle joy (8 ways)
Screenshots de Hidden Catch (World) / Tul Lin Gu Lim Chat Ki '98 (Korea) (pcb ver 3.03)
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0.74u2 [?]
0.72u2 [?]
< Korea >
WIP:
- 0.114: David Haywood avoided a memset in the Hyperstone core to give ~4% speedup in Hidden Catch.
- 0.105u2: Added missing sound3 rom ($0 - QDSP wavetabl). Changed E1-32N CPU1 clock speed to 45MHz.
- 0.103u5: Pierpaolo Prazzoli fixed Hidden Catch - Game now playable. Changed description to 'Hidden Catch (World) / Tul Lin Gu Lim Chat Ki '98 (Korea) (pcb ver 3.03)'. Changed E1-32N CPU1 clock speed to 50MHz. Added dipswitches 'Show Settings' and 'Show Counters'.
- 30th January 2006: Pierpaolo Prazzoli - Working hard on Eolith games. This time I could make Hidden Catch - (c)1998 Eolith to work. It suffered from a nasty bug in the Hyperstone cpu core, because it used a memory instruction which reads data from the memory address stored in the source register, writes the data read in the destination register and then increments the source register by 4, but... if source and destination registers are the same? Well, it only incremented the register instead of reading the data from memory without incrementing it. This is strange because they could have used a normal instruction which does the same but doesn't increment the source register, but anyway... probably the compiler was a bit crap.
- 0.96: Changed user1/2 roms to cpu1/user1 roms.
- 0.92: Changed E1-32N CPU1 clock speed to 20MHz and visible area to 320x240. Fixed rom loading. Added dipswitches 'Test Mode' and 'DSW1-2' to 'DSW1-8'. Changed description to 'Hidden Catch (World) / Tul Lin Gu Lim Chat Ki '98 (Korea)'.
- 0.88u4: Replaced E1-32XS CPU with E1-32N.
- 0.87: Fixed gfx1 roms addresses.
- 0.76u2: Changed region cpu1 to user1.
- 0.74u2: Added Hidden Catch (Eolith 1998).
- 0.72u2: Added Hidden Catch (Testdriver). Preliminary Hyperstone Core, not yet working well enough to run anything [Pierpaolo Prazzoli].
LEVELS: 50
Romset: 26688 kb / 12 files / 14.1 zip
0.72u2 [?]
< Korea >
WIP:
- 0.114: David Haywood avoided a memset in the Hyperstone core to give ~4% speedup in Hidden Catch.
- 0.105u2: Added missing sound3 rom ($0 - QDSP wavetabl). Changed E1-32N CPU1 clock speed to 45MHz.
- 0.103u5: Pierpaolo Prazzoli fixed Hidden Catch - Game now playable. Changed description to 'Hidden Catch (World) / Tul Lin Gu Lim Chat Ki '98 (Korea) (pcb ver 3.03)'. Changed E1-32N CPU1 clock speed to 50MHz. Added dipswitches 'Show Settings' and 'Show Counters'.
- 30th January 2006: Pierpaolo Prazzoli - Working hard on Eolith games. This time I could make Hidden Catch - (c)1998 Eolith to work. It suffered from a nasty bug in the Hyperstone cpu core, because it used a memory instruction which reads data from the memory address stored in the source register, writes the data read in the destination register and then increments the source register by 4, but... if source and destination registers are the same? Well, it only incremented the register instead of reading the data from memory without incrementing it. This is strange because they could have used a normal instruction which does the same but doesn't increment the source register, but anyway... probably the compiler was a bit crap.
- 0.96: Changed user1/2 roms to cpu1/user1 roms.
- 0.92: Changed E1-32N CPU1 clock speed to 20MHz and visible area to 320x240. Fixed rom loading. Added dipswitches 'Test Mode' and 'DSW1-2' to 'DSW1-8'. Changed description to 'Hidden Catch (World) / Tul Lin Gu Lim Chat Ki '98 (Korea)'.
- 0.88u4: Replaced E1-32XS CPU with E1-32N.
- 0.87: Fixed gfx1 roms addresses.
- 0.76u2: Changed region cpu1 to user1.
- 0.74u2: Added Hidden Catch (Eolith 1998).
- 0.72u2: Added Hidden Catch (Testdriver). Preliminary Hyperstone Core, not yet working well enough to run anything [Pierpaolo Prazzoli].
LEVELS: 50
Romset: 26688 kb / 12 files / 14.1 zip
